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SIM_instruction_read_input_reg, SIM_instruction_read_output_reg, SIM_instruction_write_input_reg, SIM_instruction_write_output_reg — read/write register values

SIM_instruction_read_input_reg(instruction_id_t ii, 
                               register_id_t ri);
SIM_instruction_read_output_reg(instruction_id_t ii,
                                register_id_t ri);
SIM_instruction_write_input_reg(instruction_id_t ii, 
                                register_id_t ri,
                                attr_value_t val);
SIM_instruction_write_output_reg(instruction_id_t ii, 
                                 register_id_t ri,
                                 attr_value_t val);

SIM_instruction_read_input_reg returns the value of an input register for instruction ii identified by the register id ri. The register id:s for a particular instruction can be retrieved by a calling SIM_instruction_get_reg_info.

For integer and control registers the attr_value_t will be of kind Sim_Val_Integer. Floating point registers uses also the Sim_Val_Integer kind but the floating point number is stored as raw bits. Only single precision registers can be read, thus to read a double precision register both its low and high half must be read in separate calls. For quad precision registers four calls are required (SPARC).

Sim_Val_Nil will be returned if the value has not yet been produced by earlier instructions (see below).

The value is not read from the architecturally register state but from an internal renamed register which holds the input value of the corresponding register. Thus reading the same register from different instructions may yield different values even in the same cycle.

The value read is either produced by an previously executed instruction (this requires that the instructions are inserted in the tree and decoded) or explicitly set by the user using SIM_instruction_write_input_reg. In the later case the instruction will be regarded as speculative until an earlier non-speculative instruction produces the same value. If this never happens the instruction cannot be committed without the risk of executing incorrectly. This is how value prediction can be modeled (see the description of SIM_instruction_write_output_reg below as well).

SIM_instruction_proceed and SIM_instruction_commit will not accept a speculative instruction to commit. If this is requested the user needs to call SIM_instruction_force_correct first to redirect the correct execution path. This is however strongly discouraged since it may lead to incorrect execution.

SIM_instruction_read_output_reg reads the output value of a register from the instruction. This requires the instruction to be executed first.

SIM_instruction_write_output_reg writes the output register for an instruction. This is a convenient way of handling value speculation. The value written will propagate down the instruction tree exactly as if SIM_instruction_write_input_reg had been used for all instructions that use the value. This function can only be used for instructions that have not yet reached the execution phase.

Index Thrown if ii is illegal or if ri is an illegal register.
attr_value_t/Sim_Val_Integer on success,
attr_value_t/Sim_Val_Nil if the value is not yet produced,
SIM_instruction_write_output_reg returns Sim_IE_Illegal_Phase if the instruction has reached the execution phase.

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