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Appendix C -   x86 Instructions

Synchronized instructions of type 1:

ENTERallocate stack space when entering procedure
POPA(D)pop all registers from stack
PUSHA(D)push all registers onto the stack

Synchronized instructions of type 2:

CALLcall procedure (in other seg.)
CLFLUSHFlushes cache lines
CLIclear interrupt flag
CLTSclear task-switched flag in CR0
CPUIDreturns processor identification information
EMMSempty MMX state
FP instr.
FXRSTORrestore x87 FPU, MMX, XMM, and MXCSR state
INinput from port; fixed port
INnput from port; variable port
(REP) INSinput from DX port
INT ninterrupt type n
INTOinterrupt 4 on overflow
INTsingle step interrupt 3
INVDinvalidate cache
INVLPGInvalidate TLB Entry
IRET/IRETDinterrupt return
JMPunconditional jump (to other seg.)
JMPunconditional jump (to other seg.)
LDSload pointer to DS
LESload pointer to ES
LFENCESerializes load operations
LFSload pointer to FS
LGDTLoad Global Descriptor Table Register
LGSload pointer to GS
LLDTLoad Local Descriptor Table Register
LMSWLoad Machine Status Word
LOCK prefixed instr.
LSSload pointer to SS
LTRLoad Task Register
MFENCESerializes load and store operations
MOVdata to segment register
MOVmove to control register
MOVmove to debug register
OUToutput to port; fixed port
OUToutput to port; variable port
OUTSoutput to DX port
POPpop top of stack into DS
POPpop top of stack into FS
POPpop top of stack into GS
PUSHpush CS onto the stack
PUSHpush DS word onto the stack
PUSHpush ES onto stack
PUSHpush SS onto stack
RETreturn from procedure (to other seg)
RSMresume from system management mode
SFENCESerializes store operations
STIset interrupt flag
SYSENTERfast call to pl 0 system procedures
SYSEXITfast return from fast system call
WBINVDwrite-back and invalidate data cache
WRMSRwrite to model-specific register

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