Register info for all registered configuration registers. The format for each entry is (offset, name, size, write-mask).
The 64 PCI configuration registers, each 32 bits in size.
The 'Control Status' register
DMA Command Configuration Register
DMA Data Configuration Register
ROM object, map size, and map function number for the Expansion ROM.
Set to 1 if a firmware has been downloaded to the controller.
Current state of the firmware
The 'Host Control' register
State of the interrupt pin.
Set if last io request was done using the Execute-IOCB mailbox command.
Obsolete - used for checkpoint compatibility.
List of io-requests that are handled by the controller and waiting to be sent back to the host as completed.
The 'Interrupt Control' register
Set when controller has a requested interrupt out-standing
The 'Interrupt Status' register
Last accessed bios address
List of input mailboxes
List of output mailboxes
List of all current PCI IO and memory mappings.
Set if controller should do negotiation of wide/async settings with the target.
Index of the next free I/O request.
State machine info for nvram control
The PCI bus this device is connected to, implementing the pci-bus interface.
Contents of the RAM that holds downloaded firmware for the controller.
Address to start of request queue
Length of request queue
Address to start of response queue
Length of response queue
The name of the SCSI bus that the device is connected to. This object must implement the 'scsi-bus' interface.
The (target) id on the scsi bus for the controller itself.
The SCSI message buffer.
Length of the current SCSI message.
Position in the SCSI message buffer.
The 'Semaphore' register
The scsi id for the currently selected target.
The active lun for the currently selected target.
Per target information.
Write masks for all registered configuration registers. The format for each entry is (offset, mask).
|info||print information about the device|
|pci-header||print PCI device header|
|status||print status of the device|