(phys-bits, virt-bits) Number of bits in physical and virtual addresses.
((address profiler, view)*) Address profiler views selected for this processor. Affects only the display of profiling information, and has nothing to do with collecting it.
This attribute should contain a list of lists: one list for each address profiler view you want to select (in the order they are to appear), each containing first the address profiler object, then the index of the desired view.
Implemented architecture (msp430)
This attribute is TRUE if the processor uses big-endian byte order and FALSE if it uses little-endian.
True if this processor supports branch profiling in -stall mode, false otherwise.
The group that this processor belongs to. A cpu group is a collection if cpus that may share memory and/or send interrupts between them. The group must implement the "cpu_group"interface.
Current context object.
Modeling parameter related to processor scheduling.
Time measured in cycles from machine start.
Obsolete attribute that was used to keep information about the current memory transaction if is_stalling is set.
TRUE if the processor is enabled. If FALSE, it will see time (cycles) pass but not execute steps.
Object representing the environment
((object, description, time)*). All events in queue with a human-readable description. The attribute is indexed by queue (Sim_Queue_Step/Time).
Processor clock frequency in MHz.
(pc, sp, sr, cg2, r4, ..., r15) General purpose registers
Instruction fetch line size for this processor.
Instruction fetch mode
Not for manual use
TRUE if the processor is currently stalling by request of a timing-model.
Lock granularity of atomic instructions
When non-zero, the internal load/store queue is enabled. Only applicable if ooo-mode is "micro-architecture"
(internal) Set debug file for MAI
Memory read/write profilers.
Base 2 logarithm of memory profiling granularity.
The minimum size (in bytes) of a cache line that can be represented by Simics (when connecting a cache memhier).
((name, user-value, supervisor-value), ...) List of per-mode counters.
"in-order" or "micro-architecture".
Not for manual use
Physical memory space. Must implement both the memory-space and the breakpoint interface.
Simics internal processor number for this CPU. Each processor must have a unique processor number. This attribute can only be set as part of an initial configuration.
The number of cycles the processor will stall
If is_stalling is set, this contains information about the current memory operation.
"constant" indicates a constant finite step/cycle factor; "infinite" means that steps are run without advancing time.
((object, value, slot, step)*). Pending step queue events. object must implement the event_poster interface.
(q, p, r) where q/p is the step per cycle rate, p is a power of 2 and r indicates how much of a cycle that the current step has consumed.
Number steps executed since machine start.
((object, value, slot, cycle)*). Pending time queue events. object must implement the event_poster interface.
|reset||reset the processor|