States of the A2, A1, and A0 address pins. N.b., A1's logic is reversed by the chip
The current address being read from
The state of the device. 0 for clear, 1 for got start, and 2 for got start and address
The I2C bus the EEPROM is connected to
The state of the I2C interface of the device. 0 for idle, 1 for master transmit, 2 for master receive, 3 for slave transmit, and 4 for slave receive.
The on-chip memory bank
|info||print information about the device|
|status||print status of the device|